this post was submitted on 11 Feb 2024
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[–] [email protected] 49 points 9 months ago (3 children)
[–] [email protected] 19 points 9 months ago (2 children)

But it's possible with almost zero ram, like 32mb, but it'll be a very slow experience

[–] [email protected] 10 points 9 months ago

Yeah. That should work, but it will be slow as hell, since stuff has to be split up into 32mb blocks to be executed.

[–] [email protected] 8 points 9 months ago (2 children)

OpenWRT users beg to differ... kinda. 32mb is now very low and barely sufficient, but not that long ago it was just enough to run Linux

[–] [email protected] 4 points 9 months ago

And that's without any swap! Because guess what, flash size is even lower with only 4MB!

[–] [email protected] 3 points 9 months ago

Yeah 32mb will suck but with swap space it'll be usable

[–] [email protected] 9 points 9 months ago
[–] [email protected] 6 points 9 months ago* (last edited 9 months ago) (2 children)

Actually, I believe it should be possible (albeit horrendously slow) by memory-mapping the disk to address space.

[–] [email protected] 14 points 9 months ago

Maybe for the OS. Still the BIOS/UEFI requires phisical RAM to boot

[–] [email protected] 13 points 9 months ago (1 children)

Absolutely not. Memory mapping is a concept created by the OS. The CPU won't operate without RAM of some kind. It's a fundamental hardware issue.

[–] [email protected] 5 points 9 months ago* (last edited 9 months ago) (1 children)

To boot a normal OS sure, but anything small enough to fit in registers/cache could do without RAM. That's still some form of working memory though, so it's probably not what they meant.

You could build something RAM-less if you only need the thing to process real-time events like some signal processing with only 1 pass (also see: tons of FPGA and DSP applications)

[–] [email protected] 5 points 9 months ago

Yes I would count cache as a type of RAM. Also I don't think the cache hierarchy would actually work without main memory as it's foundation in a lot of cases. They are designed to have memory to map to. It would also be difficult in some systems to coordinate between cores as not every system has shared cache between all cores.