Thanks. It sounds like an interesting architecture to look into how the rest is abstracted within the CPU basics like ALU, timers, flags, and interrupts

[–] bitcrafter 2 points 1 week ago (1 children)

It's not really an architecture that is intended to map into anything in existing hardware, but having said that, Mill Computing is working on a new extremely unconventional architecture that is a lot closer to this; you can read more about it here, and specifically the design of the register file (which resembles a convener belt) is discussed here.

[–] [email protected] 1 points 1 week ago

I was thinking of stack machines when I asked about LLVM in hardware. It is interesting to see them mentioned here. At the end of the second link to the conveyer belt description, it calls the belt a programming model. So is this actually implemented anywhere in conventional hardware. The belt and the way registers are used makes intuitive sense to me. I do not understand exactly where the ALU sits or how flags and interrupts fit in.

I get rather confused going from the basics of Ben Eater/Melvino's 8-bit processor to pipelines and out of order execution. This makes more sense in my surface understanding so far. Thanks for sharing.